The hardware is made up of two boards. Although I officially baptised them the "Logic Stage" and the "RF Stage", I think it's better to think of them as the "easy" board and the "tricky" board.

The "easy" board holds the microcontroller (STM32F302, an ARM Cortex M4 running at 72Mhz), the USB interface, power regulator, EEPROM and GPS. It carries nothing more than power and digital signals. No analog RF signal traverses any trace on it.

The "tricky" board, is effectively a mixed signal circuit. It holds the RF ICs (which share the same SPI bus), the LNA, the Front End Module and the associated analog filters. The critical RF traces are designed as coplanar waveguides with liberal quantities of via stitches, and they should be close to 50Ohm for Oshpark's 2-layer PCB and dialectric.

The two dual-layer PCBs are mirror images of each other and they mate with standard .01" male/female pins. Unlike Arduino and Pi hats, the boards mate "back-to-back", so as to maximize isolation between the MCU and the RF traces.

I chose to partition the hardware in this way to minimize the pain of iterating, since the analog RF stage went (and will continue to go) through more iterations than the MCU / EEPROM / GPS stage.