Enabled watchdog for N2k adapter

latest/Firmware/NMEA200Adapter/.cproject

@@ -355,7 +355,7 @@
 					</folderInfo>
 					<sourceEntries>
 						<entry excluding="nmea2000/ActisenseReader.cpp|ais/ais_py.cpp|NMEA2000/src/Seasmart.cpp|libais/src/libais/ais9.cpp|libais/src/libais/ais8.cpp|libais/src/libais/ais8_367.cpp|libais/src/libais/ais8_366.cpp|libais/src/libais/ais8_366_22.cpp|libais/src/libais/ais8_200.cpp|libais/src/libais/ais8_1_26.cpp|libais/src/libais/ais8_1_22.cpp|libais/src/libais/ais7_13.cpp|libais/src/libais/ais6.cpp|libais/src/libais/ais4_11.cpp|libais/src/libais/ais27.cpp|libais/src/libais/ais26.cpp|libais/src/libais/ais25.cpp|libais/src/libais/ais23.cpp|libais/src/libais/ais22.cpp|libais/src/libais/ais20.cpp|libais/src/libais/ais19.cpp|libais/src/libais/ais17.cpp|libais/src/libais/ais16.cpp|libais/src/libais/ais15.cpp|libais/src/libais/ais14.cpp|libais/src/libais/ais12.cpp|libais/src/libais/ais10.cpp|libais/src/libais/ais_decode_normed.cpp|libais/test|libais/src/libais/ais_py.cpp|libais/src/test|libais/third_party|NMEA0183/Examples|NMEA0183-AIS/Examples|NMEA2000/test/millis.cpp|NMEA2000/src/ActisenseReader.cpp|NMEA2000/Examples|NMEA2000/Examples/NMEA2000ToNMEA0183|NMEA2000/test/SeasmartTests.cpp|NMEA2000/third-party/catch/catch.cpp|Core|Drivers|startup" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
-						<entry excluding="Src/bsp/board_1.3.cpp|Src/stm32l4xx_hal_msp.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
+						<entry excluding="Src/bsp/board_2.0.cpp|Src/bsp/board_1.3.cpp|Src/stm32l4xx_hal_msp.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
 						<entry excluding="startup_stm32l422xx.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="startup"/>
 					</sourceEntries>

latest/Firmware/NMEA200Adapter/Core/Inc/bsp/bsp.hpp

@@ -26,6 +26,9 @@ void delay(uint32_t ms);
 
 void bsp_delay_us(uint32_t us);
 
+void bsp_start_wdt();
+void bsp_refresh_wdt();
+
 // IRQ setup
 bool bsp_is_isr();
 typedef void(*can_irq_callback)();
@@ -38,4 +41,5 @@ uint8_t bsp_last_can_address();
 void bsp_save_can_address(uint8_t);
 
 
+
 #endif /* INC_BSP_BSP_HPP_ */

latest/Firmware/NMEA200Adapter/Core/Inc/stm32l4xx_hal_conf.h

@@ -52,7 +52,7 @@
 /*#define HAL_HASH_MODULE_ENABLED   */
 /*#define HAL_I2S_MODULE_ENABLED   */
 /*#define HAL_IRDA_MODULE_ENABLED   */
-/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_IWDG_MODULE_ENABLED
 /*#define HAL_LTDC_MODULE_ENABLED   */
 /*#define HAL_LCD_MODULE_ENABLED   */
 /*#define HAL_LPTIM_MODULE_ENABLED   */

latest/Firmware/NMEA200Adapter/Core/Src/NMEA0183Consumer.cpp

@@ -378,13 +378,10 @@ void NMEA0183Consumer::processAISBody(tN2kAISTranceiverInfo aisInfo, const strin
         if ( mN2K->SendMsg(n2kmsg) )
           {
             printf("Sent PGN129794:\r\n");
-#if 0
+          }
-            for ( int i = 0; i < n2kmsg.DataLen; ++i )
+        else
-              {
+          {
-                printf("%.2x ", n2kmsg.Data[i]);
+            printf("Failed to send PGN 129794\r\n");
-              }
-            printf("\r\n\r\n");
-#endif
           }
       }
       break;
@@ -418,6 +415,10 @@ void NMEA0183Consumer::processAISBody(tN2kAISTranceiverInfo aisInfo, const strin
           {
             printf("Sent PGN129039\r\n");
           }
+        else
+          {
+            printf("Failed to send PGN 129039\r\n");
+          }
       }
       break;
     case 21:
@@ -449,7 +450,11 @@ void NMEA0183Consumer::processAISBody(tN2kAISTranceiverInfo aisInfo, const strin
 
         if ( mN2K->SendMsg(n2kmsg) )
           {
-            printf("Sent PGN 129041\r\n");
+            printf("Sent PGN129041\r\n");
+          }
+        else
+          {
+            printf("Failed to send PGN 129041\r\n");
           }
       }
       break;
@@ -492,11 +497,14 @@ void NMEA0183Consumer::processAISBody(tN2kAISTranceiverInfo aisInfo, const strin
             if ( m->part_num == 0 )
               {
                 printf("Sent PGN129809\r\n");
-                printf("Bits: %d, Padding: %d, Name: %s\r\n", m->numBits(), bitPadding, m->name.c_str());
               }
             else
               printf("Sent PGN129810\r\n");
           }
+        else
+          {
+            printf("Failed to send PGN129809/810\r\n");
+          }
       }
       break;
     default:

latest/Firmware/NMEA200Adapter/Core/Src/bsp/board_2.0.cpp

@@ -76,6 +76,7 @@ SPI_HandleTypeDef hspi1;
 UART_HandleTypeDef huart1;
 UART_HandleTypeDef huart2;
 TIM_HandleTypeDef htim6;
+IWDG_HandleTypeDef hiwdg;
 
 void gpio_pin_init();
 void SystemClock_Config(void);
@@ -89,6 +90,25 @@ void bsp_set_uart_irq_cb(uart_irq_callback cb)
   usart_irq = cb;
 }
 
+void bsp_start_wdt()
+{
+  IWDG_InitTypeDef iwdg;
+  iwdg.Prescaler = IWDG_PRESCALER_8;
+  iwdg.Reload = 0x0fff;
+  iwdg.Window = 0x0fff;
+
+  hiwdg.Instance = IWDG;
+  hiwdg.Init = iwdg;
+
+  HAL_IWDG_Init(&hiwdg);
+}
+
+void bsp_refresh_wdt()
+{
+  HAL_IWDG_Refresh(&hiwdg);
+}
+
+
 void bsp_set_can_irq_cb(can_irq_callback cb)
 {
   can_irq = cb;
@@ -391,8 +411,9 @@ void SystemClock_Config(void)
   /** Initializes the RCC Oscillators according to the specified parameters
    * in the RCC_OscInitTypeDef structure.
    */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSI;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;

latest/Firmware/NMEA200Adapter/Core/Src/bsp/poc_board.cpp

@@ -35,6 +35,25 @@
 #define CAN_IRQ_PIN               GPIO_PIN_0
 
 
+#define CONFIG_ADDRESS            0x0801F800
+#define CONFIG_MAGIC              0x313DEEF6
+
+typedef struct
+{
+  uint32_t magic;
+  uint32_t address;
+} CANConfig;
+
+
+typedef union
+{
+  CANConfig can;
+  uint64_t dw[128];
+} ConfigPage;
+
+static ConfigPage __page;
+
+
 typedef struct
 {
   GPIO_TypeDef *port;
@@ -57,6 +76,7 @@ static const GPIO __gpios[] = {
 SPI_HandleTypeDef hspi1;
 UART_HandleTypeDef huart1;
 TIM_HandleTypeDef htim6;
+IWDG_HandleTypeDef hiwdg;
 
 void gpio_pin_init();
 void SystemClock_Config(void);
@@ -176,6 +196,25 @@ void gpio_pin_init()
     }
 }
 
+void bsp_start_wdt()
+{
+  IWDG_InitTypeDef iwdg;
+  iwdg.Prescaler = IWDG_PRESCALER_8;
+  iwdg.Reload = 0x0fff;
+  iwdg.Window = 0x0fff;
+
+  hiwdg.Instance = IWDG;
+  hiwdg.Init = iwdg;
+
+  HAL_IWDG_Init(&hiwdg);
+}
+
+void bsp_refresh_wdt()
+{
+  HAL_IWDG_Refresh(&hiwdg);
+}
+
+
 bool bsp_is_isr()
 {
   return __get_IPSR();
@@ -207,6 +246,59 @@ void bsp_delay_us(uint32_t us)
   HAL_TIM_Base_Stop(&htim6);
 }
 
+uint8_t bsp_last_can_address()
+{
+  ConfigPage *cfg = (ConfigPage*)CONFIG_ADDRESS;
+  if ( cfg->can.magic == CONFIG_MAGIC )
+    return cfg->can.address & 0xff;
+
+  return 15;
+}
+
+bool bsp_erase_config_page()
+{
+  uint32_t page = (CONFIG_ADDRESS - FLASH_BASE) / FLASH_PAGE_SIZE;
+
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
+  HAL_FLASH_Unlock();
+
+  FLASH_EraseInitTypeDef erase;
+  erase.TypeErase = FLASH_TYPEERASE_PAGES;
+  erase.Banks     = FLASH_BANK_1;
+  erase.Page      = page;
+  erase.NbPages   = 1;
+
+  uint32_t errPage;
+  HAL_StatusTypeDef status = HAL_FLASHEx_Erase(&erase, &errPage);
+  if ( status != HAL_OK )
+    {
+      HAL_FLASH_Lock();
+      return false;
+    }
+
+  HAL_FLASH_Lock();
+  return true;
+}
+
+void bsp_save_can_address(uint8_t address)
+{
+  __page.can.magic = CONFIG_MAGIC;
+  __page.can.address = address;
+
+  uint32_t pageAddress = CONFIG_ADDRESS;
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
+  HAL_FLASH_Unlock();
+  HAL_StatusTypeDef status = HAL_OK;
+  for ( uint32_t dw = 0; dw < sizeof __page/8; ++dw )
+    {
+      status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, pageAddress + dw*8, __page.dw[dw]);
+      if ( status != HAL_OK )
+        break;
+    }
+  HAL_FLASH_Lock();
+}
+
+
 extern "C" {
 
   int _write(int fd, char* ptr, int len)
@@ -280,8 +372,9 @@ void SystemClock_Config(void)
   /** Initializes the RCC Oscillators according to the specified parameters
    * in the RCC_OscInitTypeDef structure.
    */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSI;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;

latest/Firmware/NMEA200Adapter/Core/Src/main.cpp

@@ -11,7 +11,7 @@
 int main(void)
 {
   bsp_init();
-#if 1
+
   printf("MAIANA NMEA2000 adapter started\r\n");
 
   EventPool::instance().init();
@@ -26,7 +26,6 @@ int main(void)
   DebugMsgHandler handler;
   n2k->AttachMsgHandler(&handler);
 #else
-  // TODO: BSP abstraction for address persistence to/from flash
   n2k->SetMode(tNMEA2000::N2km_NodeOnly, bsp_last_can_address());
   n2k->SetN2kCANSendFrameBufSize(256);
   n2k->ExtendTransmitMessages(TXMessages);
@@ -35,7 +34,7 @@ int main(void)
   n2k->SetProductInformation("",            // Manufacturer's Model serial code
                              1,             // Manufacturer's product code
                              "MAIANA",      // Manufacturer's Model ID
-                             "1.0.1",       // Manufacturer's Software version code
+                             "1.1.0",       // Manufacturer's Software version code
                              "1.0",         // Manufacturer's Model version
                              0);
 
@@ -60,6 +59,7 @@ int main(void)
   NMEA0183Consumer::instance().init(n2k);
 #endif
 
+  bsp_start_wdt();
   while (1)
     {
       // Our own event loop
@@ -72,25 +72,14 @@ int main(void)
       __WFI();
 
       // Only run this about every 10 seconds
-      static uint32_t c = 1;
+      uint32_t c = millis();
       if ( c % 10000 == 0 && n2k->ReadResetAddressChanged() )
         {
           bsp_save_can_address(n2k->GetN2kSource());
-          c = 1;
         }
 
-      ++c;
+      bsp_refresh_wdt();
     }
-#else
-  printf("Hello world, %lu\r\n", millis());
-  //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, GPIO_PIN_SET);
-  while(1)
-    {
-      //__WFI();
-      bsp_delay_us(25000);
-      HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_1);
-    }
-#endif
 
   return 1;
 }

latest/Firmware/NMEA200Adapter/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h

@@ -0,0 +1,242 @@
+/**
+  ******************************************************************************
+  * @file    stm32l4xx_hal_iwdg.h
+  * @author  MCD Application Team
+  * @brief   Header file of IWDG HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L4xx_HAL_IWDG_H
+#define STM32L4xx_HAL_IWDG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l4xx_hal_def.h"
+
+/** @addtogroup STM32L4xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup IWDG IWDG
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Types IWDG Exported Types
+  * @{
+  */
+
+/**
+  * @brief  IWDG Init structure definition
+  */
+typedef struct
+{
+  uint32_t Prescaler;  /*!< Select the prescaler of the IWDG.
+                            This parameter can be a value of @ref IWDG_Prescaler */
+
+  uint32_t Reload;     /*!< Specifies the IWDG down-counter reload value.
+                            This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
+
+  uint32_t Window;     /*!< Specifies the window value to be compared to the down-counter.
+                            This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
+
+} IWDG_InitTypeDef;
+
+/**
+  * @brief  IWDG Handle Structure definition
+  */
+typedef struct
+{
+  IWDG_TypeDef                 *Instance;  /*!< Register base address    */
+
+  IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
+} IWDG_HandleTypeDef;
+
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
+  * @{
+  */
+
+/** @defgroup IWDG_Prescaler IWDG Prescaler
+  * @{
+  */
+#define IWDG_PRESCALER_4                0x00000000u                                     /*!< IWDG prescaler set to 4   */
+#define IWDG_PRESCALER_8                IWDG_PR_PR_0                                    /*!< IWDG prescaler set to 8   */
+#define IWDG_PRESCALER_16               IWDG_PR_PR_1                                    /*!< IWDG prescaler set to 16  */
+#define IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 32  */
+#define IWDG_PRESCALER_64               IWDG_PR_PR_2                                    /*!< IWDG prescaler set to 64  */
+#define IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 128 */
+#define IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)                   /*!< IWDG prescaler set to 256 */
+
+/**
+  * @}
+  */
+
+/** @defgroup IWDG_Window_option IWDG Window option
+  * @{
+  */
+#define IWDG_WINDOW_DISABLE             IWDG_WINR_WIN
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
+  * @{
+  */
+
+/**
+  * @brief  Enable the IWDG peripheral.
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define __HAL_IWDG_START(__HANDLE__)                WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
+
+/**
+  * @brief  Reload IWDG counter with value defined in the reload register
+  *         (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__)       WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Functions  IWDG Exported Functions
+  * @{
+  */
+
+/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
+  * @{
+  */
+/* Initialization/Start functions  ********************************************/
+HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
+/**
+  * @}
+  */
+
+/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
+  * @{
+  */
+/* I/O operation functions ****************************************************/
+HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup IWDG_Private_Constants IWDG Private Constants
+  * @{
+  */
+
+/**
+  * @brief  IWDG Key Register BitMask
+  */
+#define IWDG_KEY_RELOAD                 0x0000AAAAu  /*!< IWDG Reload Counter Enable   */
+#define IWDG_KEY_ENABLE                 0x0000CCCCu  /*!< IWDG Peripheral Enable       */
+#define IWDG_KEY_WRITE_ACCESS_ENABLE    0x00005555u  /*!< IWDG KR Write Access Enable  */
+#define IWDG_KEY_WRITE_ACCESS_DISABLE   0x00000000u  /*!< IWDG KR Write Access Disable */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup IWDG_Private_Macros IWDG Private Macros
+  * @{
+  */
+
+/**
+  * @brief  Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)  WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
+
+/**
+  * @brief  Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
+
+/**
+  * @brief  Check IWDG prescaler value.
+  * @param  __PRESCALER__  IWDG prescaler value
+  * @retval None
+  */
+#define IS_IWDG_PRESCALER(__PRESCALER__)      (((__PRESCALER__) == IWDG_PRESCALER_4)  || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_8)  || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_16) || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_32) || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_64) || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_256))
+
+/**
+  * @brief  Check IWDG reload value.
+  * @param  __RELOAD__  IWDG reload value
+  * @retval None
+  */
+#define IS_IWDG_RELOAD(__RELOAD__)            ((__RELOAD__) <= IWDG_RLR_RL)
+
+/**
+  * @brief  Check IWDG window value.
+  * @param  __WINDOW__  IWDG window value
+  * @retval None
+  */
+#define IS_IWDG_WINDOW(__WINDOW__)            ((__WINDOW__) <= IWDG_WINR_WIN)
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L4xx_HAL_IWDG_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

latest/Firmware/NMEA200Adapter/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c

@@ -0,0 +1,264 @@
+/**
+  ******************************************************************************
+  * @file    stm32l4xx_hal_iwdg.c
+  * @author  MCD Application Team
+  * @brief   IWDG HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the Independent Watchdog (IWDG) peripheral:
+  *           + Initialization and Start functions
+  *           + IO operation functions
+  *
+  @verbatim
+  ==============================================================================
+                    ##### IWDG Generic features #####
+  ==============================================================================
+  [..]
+    (+) The IWDG can be started by either software or hardware (configurable
+        through option byte).
+
+    (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
+        if the main clock fails.
+
+    (+) Once the IWDG is started, the LSI is forced ON and both can not be
+        disabled. The counter starts counting down from the reset value (0xFFF).
+        When it reaches the end of count value (0x000) a reset signal is
+        generated (IWDG reset).
+
+    (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
+        the IWDG_RLR value is reloaded in the counter and the watchdog reset is
+        prevented.
+
+    (+) The IWDG is implemented in the VDD voltage domain that is still functional
+        in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
+        IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
+        reset occurs.
+
+    (+) Debug mode : When the microcontroller enters debug mode (core halted),
+        the IWDG counter either continues to work normally or stops, depending
+        on DBG_IWDG_STOP configuration bit in DBG module, accessible through
+        __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
+
+    [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
+         The IWDG timeout may vary due to LSI frequency dispersion. STM32L4xx
+         devices provide the capability to measure the LSI frequency (LSI clock
+         connected internally to TIM16 CH1 input capture). The measured value
+         can be used to have an IWDG timeout with an acceptable accuracy.
+
+                     ##### How to use this driver #####
+  ==============================================================================
+  [..]
+    (#) Use IWDG using HAL_IWDG_Init() function to :
+      (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
+           clock is forced ON and IWDG counter starts counting down.
+      (++) Enable write access to configuration registers:
+          IWDG_PR, IWDG_RLR and IWDG_WINR.
+      (++) Configure the IWDG prescaler and counter reload value. This reload
+           value will be loaded in the IWDG counter each time the watchdog is
+           reloaded, then the IWDG will start counting down from this value.
+      (++) Wait for status flags to be reset.
+      (++) Depending on window parameter:
+        (+++) If Window Init parameter is same as Window register value,
+             nothing more is done but reload counter value in order to exit
+             function with exact time base.
+        (+++) Else modify Window register. This will automatically reload
+             watchdog counter.
+
+    (#) Then the application program must refresh the IWDG counter at regular
+        intervals during normal operation to prevent an MCU reset, using
+        HAL_IWDG_Refresh() function.
+
+     *** IWDG HAL driver macros list ***
+     ====================================
+     [..]
+       Below the list of most used macros in IWDG HAL driver:
+      (+) __HAL_IWDG_START: Enable the IWDG peripheral
+      (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
+          the reload register
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l4xx_hal.h"
+
+/** @addtogroup STM32L4xx_HAL_Driver
+  * @{
+  */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+/** @addtogroup IWDG
+  * @brief IWDG HAL module driver.
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/** @defgroup IWDG_Private_Defines IWDG Private Defines
+  * @{
+  */
+/* Status register need 5 RC LSI divided by prescaler clock to be updated. With
+   higher prescaler (256), and according to LSI variation, we need to wait at
+   least 6 cycles so 48 ms. */
+#define HAL_IWDG_DEFAULT_TIMEOUT            48u
+/**
+  * @}
+  */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup IWDG_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup IWDG_Exported_Functions_Group1
+  *  @brief    Initialization and Start functions.
+  *
+@verbatim
+ ===============================================================================
+          ##### Initialization and Start functions #####
+ ===============================================================================
+ [..]  This section provides functions allowing to:
+      (+) Initialize the IWDG according to the specified parameters in the
+          IWDG_InitTypeDef of associated handle.
+      (+) Manage Window option.
+      (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
+          is reloaded in order to exit function with correct time base.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Initialize the IWDG according to the specified parameters in the
+  *         IWDG_InitTypeDef and start watchdog. Before exiting function,
+  *         watchdog is refreshed in order to have correct time base.
+  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
+  *                the configuration information for the specified IWDG module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
+{
+  uint32_t tickstart;
+
+  /* Check the IWDG handle allocation */
+  if (hiwdg == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameters */
+  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
+  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
+  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
+  assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
+
+  /* Enable IWDG. LSI is turned on automatically */
+  __HAL_IWDG_START(hiwdg);
+
+  /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
+  0x5555 in KR */
+  IWDG_ENABLE_WRITE_ACCESS(hiwdg);
+
+  /* Write to IWDG registers the Prescaler & Reload values to work with */
+  hiwdg->Instance->PR = hiwdg->Init.Prescaler;
+  hiwdg->Instance->RLR = hiwdg->Init.Reload;
+
+  /* Check pending flag, if previous update not done, return timeout */
+  tickstart = HAL_GetTick();
+
+  /* Wait for register to be updated */
+  while (hiwdg->Instance->SR != 0x00u)
+  {
+    if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
+    {
+      return HAL_TIMEOUT;
+    }
+  }
+
+  /* If window parameter is different than current value, modify window
+  register */
+  if (hiwdg->Instance->WINR != hiwdg->Init.Window)
+  {
+    /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
+    even if window feature is disabled, Watchdog will be reloaded by writing
+    windows register */
+    hiwdg->Instance->WINR = hiwdg->Init.Window;
+  }
+  else
+  {
+    /* Reload IWDG counter with value defined in the reload register */
+    __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+  }
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+
+/** @addtogroup IWDG_Exported_Functions_Group2
+  *  @brief   IO operation functions
+  *
+@verbatim
+ ===============================================================================
+                      ##### IO operation functions #####
+ ===============================================================================
+ [..]  This section provides functions allowing to:
+      (+) Refresh the IWDG.
+
+@endverbatim
+  * @{
+  */
+
+
+/**
+  * @brief  Refresh the IWDG.
+  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
+  *                the configuration information for the specified IWDG module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
+{
+  /* Reload IWDG counter with value defined in the reload register */
+  __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* HAL_IWDG_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/