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Good enough

This commit is contained in:
Peter Antypas 2020-11-03 23:19:59 -08:00
parent 973a28e0c7
commit ddf5e39e9b
12 changed files with 56 additions and 28 deletions

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@ -126,11 +126,11 @@ typedef struct
uint8_t Pending;
uint8_t Status;
uint8_t CurrentRSSI;
uint8_t LatchedRSSI;
uint8_t Ant1RSSI;
uint8_t Ant2RSSI;
uint8_t AFCFreqOffH;
uint8_t AFCFreqOffL;
//uint8_t LatchedRSSI;
//uint8_t Ant1RSSI;
//uint8_t Ant2RSSI;
//uint8_t AFCFreqOffH;
//uint8_t AFCFreqOffL;
} MODEM_STATUS_REPLY;
typedef struct

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@ -47,6 +47,8 @@
/* Section where include file can be added */
/* USER CODE END Includes */
#include "config.h"
/* Ensure definitions are only used by the compiler, and not by the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
@ -134,13 +136,14 @@ header file. */
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
#ifdef RTOS
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#endif
/* USER CODE BEGIN Defines */
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */

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@ -21,6 +21,7 @@
#define INC_BSP_HPP_
#include "StationData.h"
#include "config.h"
// Current board revision is 5.0
// Either modify this header or define a different symbol in the preprocessor to build for a different board

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@ -23,20 +23,18 @@
#include "radio_config.h"
#include "TXPowerSettings.h"
#include "config.h"
// Set to non-zero to enable FreeRTOS instead of "bare metal". Doesn't add much value at the moment.
#define RTOS 0
/**
* If this is defined, the device transmits carrier on channel 87 (161.975MHz) for 1 second after reset.
*/
//#define CALIBRATION_MODE 1
// Undefine to disable AIS transmission
// Set to non-zero to enable transmission support
#define ENABLE_TX 1
// Defining this fires a single packet after reset. Only do this during conducted testing, never with antenna attached!
//#define TX_TEST_MODE 1
#ifdef CALIBRATION_MODE
#define TX_POWER_LEVEL PWR_P33

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@ -94,7 +94,6 @@ void EventQueue::dispatch()
{
Event *e = nullptr;
//while ( xQueueReceive(mQueueHandle, &e, 10) == pdTRUE )
while (mISRQueue.pop(e))
{
for ( map<EventConsumer*, uint32_t>::iterator c = mConsumers.begin(); c != mConsumers.end(); ++c )

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@ -80,10 +80,13 @@ bool RFIC::sendCmd(uint8_t cmd, void* params, uint8_t paramLen, void* result, ui
bsp_tx_spi_byte(cmd);
uint8_t *b = (uint8_t*) params;
for ( int i = 0; i < paramLen; ++i )
if ( params )
{
bsp_tx_spi_byte(b[i]);
uint8_t *b = (uint8_t*) params;
for ( int i = 0; i < paramLen; ++i )
{
bsp_tx_spi_byte(b[i]);
}
}
spiOff();
//bsp_signal_low();
@ -195,6 +198,9 @@ void RFIC::powerOnReset()
;
}
/**
* This exhibits a lot of jitter, occassionally taking more than 100us to return
*/
uint8_t RFIC::readRSSI()
{
MODEM_STATUS_REPLY s;

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@ -143,6 +143,7 @@ void Receiver::onBitClock()
{
startReceiving(mChannel, false);
}
#if ENABLE_TX
/**
* This trick ensures that we only sample RSSI every 17 time slots and never in the
* same time slot for both ICs, so we don't conduct long SPI operations on consecutive
@ -155,6 +156,7 @@ void Receiver::onBitClock()
uint8_t rssi = reportRSSI();
mRXPacket->setRSSI(rssi);
}
#endif
bsp_signal_low();
}
@ -222,13 +224,13 @@ Receiver::Action Receiver::processNRZIBit(uint8_t bit)
// Start over
return RESTART_RX;
}
#if 0
if ( mOneBitCount >= 7 )
{
// Bad packet!
return RESTART_RX;
}
#endif
mLastNRZIBit = bit;
mBitWindow <<= 1;
mBitWindow |= decodedBit;

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@ -297,7 +297,7 @@ void SystemClock_Config()
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
/* SysTick_IRQn interrupt configuration */
// HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}
void gpio_pin_init()
@ -337,13 +337,13 @@ void HAL_MspInit(void)
/* UsageFault_IRQn interrupt configuration */
HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
/* SVCall_IRQn interrupt configuration */
//HAL_NVIC_SetPriority(SVCall_IRQn, 2, 0);
HAL_NVIC_SetPriority(SVCall_IRQn, 2, 0);
/* DebugMonitor_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
/* PendSV_IRQn interrupt configuration */
//HAL_NVIC_SetPriority(PendSV_IRQn, 2, 0);
HAL_NVIC_SetPriority(PendSV_IRQn, 2, 0);
/* SysTick_IRQn interrupt configuration */
//HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
/* USER CODE BEGIN MspInit 1 */

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@ -18,6 +18,7 @@
*/
#include "stm32l4xx_hal.h"
#include "config.h"
#include "RadioManager.hpp"
#include "RXPacketProcessor.hpp"
#include "DataTerminal.hpp"
@ -27,9 +28,10 @@
#include "CommandProcessor.hpp"
#include "bsp.hpp"
#include "printf_serial.h"
#ifdef RTOS
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#endif
void jump_to_bootloader()
{
@ -78,8 +80,13 @@ void mainTask(void *params)
while (1)
{
EventQueue::instance().dispatch();
#ifdef RTOS
vTaskDelay(10);
#endif
bsp_refresh_wdt();
#ifndef RTOS
__WFI();
#endif
}
}
@ -95,7 +102,7 @@ int main(void)
// This is for debugging imprecise bus faults
//*(uint8_t *)0xe000ed08 |= 2;
bsp_hw_init();
#ifdef RTOS
TaskHandle_t xHandle;
if ( xTaskCreate(mainTask, "main", 2248u, NULL, tskIDLE_PRIORITY+4, &xHandle) != pdPASS )
{
@ -103,6 +110,10 @@ int main(void)
}
vTaskStartScheduler();
#else
mainTask(nullptr);
#endif
asm("BKPT 0");
return 1;
}

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@ -4,7 +4,9 @@
* Created on: Oct 8, 2020
* Author: peter
*/
#include "config.h"
#ifdef RTOS
#include "FreeRTOS.h"
void * operator new( size_t size )
@ -26,3 +28,4 @@ void operator delete[]( void * ptr )
{
vPortFree ( ptr );
}
#endif

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@ -17,6 +17,9 @@
******************************************************************************
*/
/* USER CODE END Header */
#include "config.h"
#ifdef RTOS
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal.h"
@ -39,7 +42,7 @@ TIM_HandleTypeDef htim6;
* @param TickPriority: Tick interrupt priority.
* @retval HAL status
*/
#if 1
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
RCC_ClkInitTypeDef clkconfig;
@ -88,7 +91,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
return HAL_ERROR;
}
#endif
/**
* @brief Suspend Tick increment.
* @note Disable the tick increment by disabling TIM6 update interrupt.
@ -139,3 +142,4 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif

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@ -34,6 +34,7 @@
#include "stm32l4xx_hal.h"
#include "stm32l4xx.h"
#include "stm32l4xx_it.h"
#include "config.h"
extern TIM_HandleTypeDef htim6;
@ -254,7 +255,7 @@ void PendSV_Handler(void)
}
#endif
#if 0
#ifndef RTOS
/**
* @brief This function handles System tick timer.
*/